Introducing PlanAhead

Normally when working on older Xilinx FPGAs like the Spartan 3 or Spartan 6, you would use the “ISE project manager” to manage your projects. However, you might as well use “PlanAhead” for this. The main reason why this shift would make sense is, that the new development tool from Xilinx called “Vivado” has a similar user-interface as “PlanAhead” and therefore getting used to “PlanAhead” would make the difference seen from a user-interface perspective smaller. In the following two video I will firstly go through how to open “PlanAhead” and create an empty project, and secondly walk you through how to implement a design and create a bit-file that can be loaded on an FPGA.